On copper-seed redistribution layers for 150 mm and 200 mm wafer bumping, OFPR-800 is processed as a positive-tone novolak-diazonaphthoquinone resist after vapor-phase HMDS priming, which controls adhesion on sputtered copper and TiW seed layers. A dehydration bake at 150 °C for 60 s on a vacuum hotplate precedes coating, and the resist is dispensed with a spin coater programmed from 500 rpm spread to 4,000 rpm final spin, yielding a nominal film thickness of 1.8 µm to 2.4 µm. Softbake is maintained at 95 °C to 110 °C for 90 s to 120 s on a contact hotplate; insufficient softbake leaves residual solvent that causes lifting during acid copper sulfate electroplating. Exposure on a g-line projection aligner uses the 436 nm mercury arc line at 120 mJ/cm² to 180 mJ/cm², with the dose adjusted for copper reflectivity and topography. Development in aqueous 2.38% tetramethylammonium hydroxide is run in double puddle or spray mode to suppress scumming at the resist-substrate interface on high-topography redistribution layers. A post-develop hardbake of 110 °C to 130 °C for 60 s to 120 s densifies the novolak matrix and improves resistance to acid copper sulfate baths operating below pH 1.0. Plating compatibility is checked by immersion in a vertical cup-plate tool at 25 °C to 28 °C; resist thickness loss should remain below 5% after 1 h when measured by stylus profilometry. After copper pillar or solder bump deposition, the resist template is stripped with N-methyl-2-pyrrolidone at 80 °C to 100 °C, followed by oxygen plasma ash at 200 W to 400 W to remove organic residue before seed-layer etch. Adhesion is verified by tape test according to ASTM D3359-17 on TiW and copper seed layers, with a target classification of 5B after HMDS priming. Production failure modes include edge lifting after electroplating when softbake falls below 95 °C and plating solution penetration when dehydration is incomplete.

What Keeps OFPR-800 in Thin-Film Transistor Array Patterning for Flat-Panel Display Factories?

Flat-panel display fabs retain g-line resists for non-critical gate and data-metal layers because older Gen 4.5 and Gen 5 exposure equipment operates at 436 nm without requiring i-line conversion. OFPR-800 is coated on glass substrates with a roller coater or slit coater after cleaning and dehydration; target film thickness is normally 1.2 µm to 1.8 µm for wet etching of aluminum/molybdenum bilayers. Softbake at 90 °C to 105 °C for 120 s on a hotplate removes solvent while limiting thermal stress on 0.5 mm to 0.7 mm glass. Exposure through a proximity mask aligner uses a near-contact gap of 30 µm to 50 µm and a dose of 90 mJ/cm² to 150 mJ/cm²; the practical resolution limit under these conditions is approximately 3 µm line/space. Development with aqueous 2.38% TMAH is configured as shower spray with developer-drainage endpoint detection; double spray development prevents active-matrix via residue. For aluminum wet etching in phosphoric-nitric-acetic acid mixtures at 35 °C to 45 °C, the resist must remain adherent without lifting for 2 min to 4 min immersion. Hardbake is not always used for TFT wet etching because excessive crosslinking complicates stripping, but a low-temperature postbake at 105 °C for 60 s can reduce swelling. Stripping uses amine-based solvents at 60 °C to 70 °C followed by ultrasonic cleaning. The terminal output is the gate or source/drain electrode array in thin-film transistor backplanes for LCD televisions and monitors. Defect density after etching is monitored by automated optical inspection under 50× magnification, and the process specification commonly requires fewer than 0.1 particles per square centimeter larger than 1 µm in a cleanroom maintained to ISO 14644-1 Class 5. Non-uniform developer puddle has been observed to generate mura on large glass panels, which is a key reason for spray development on Gen 4.5 lines.In silicon microelectromechanical systems fabrication, OFPR-800 functions as a mask for deep reactive-ion etching when the silicon etch depth does not exceed 50 µm and the resist thickness can be confined to 2.0 µm to 4.0 µm. Coating follows vapor HMDS priming on the smooth or lightly roughened silicon surface, and edge bead removal with propylene glycol monomethyl ether acetate prevents contact with electrostatic chuck surfaces in the etcher. Softbake proceeds at 100 °C to 110 °C for 90 s to 150 s, followed by exposure on a contact aligner with a 436 nm mercury arc output and a dose of 150 mJ/cm² to 220 mJ/cm² to preserve vertical sidewall angles. Development in 2.38% TMAH is extended for 45 s to 70 s in puddle mode, and a hardbake at 120 °C to 140 °C for 180 s improves resistance to the Bosch process alternating SF₆ and C₄F₈ plasmas. Selectivity to silicon in DRIE is typically in the range of 40:1 to 80:1, depending on chamber passivation and silicon loading; resist erosion is monitored by stylus profilometry before and after etching. The hardbaked resist is stripped after deep etching with oxygen plasma ashing at 300 W to 600 W followed by wet treatment in N-methyl-2-pyrrolidone at 80 °C to 100 °C to remove fluorinated residues. The terminal outputs include silicon resonators, inertial sensor proof masses, and microfluidic master molds. Sidewall angle and critical dimension are verified by cross-sectional scanning electron microscopy; a post-etch critical dimension bias of less than 0.2 µm is considered acceptable for bonded-silicon inertial sensors. Residual resist micromasking during DRIE has been observed to generate black silicon on unprotected areas, so the strip sequence must include both ashing and solvent cleaning.

Downstream configuration	Nominal film thickness	G-line exposure dose	Softbake	Hardbake	Developer mode
Wafer bumping RDL	1.8–2.4 µm	120–180 mJ/cm²	95–110 °C, 90–120 s	110–130 °C, 60–120 s	2.38% TMAH double puddle
TFT array	1.2–1.8 µm	90–150 mJ/cm²	90–105 °C, 120 s	105 °C, 60 s optional	2.38% TMAH double spray
MEMS DRIE	2.0–4.0 µm	150–220 mJ/cm²	100–110 °C, 90–150 s	120–140 °C, 180 s	2.38% TMAH puddle 45–70 s
SAW filter	0.8–1.2 µm	100–140 mJ/cm²	ramp 60–95 °C, hold 90 s	not used	2.38% TMAH spray/puddle

Metal Lift-Off Undercut Profiles on GaAs Heterojunction Bipolar Transistor Wafers

Metal lift-off on gallium arsenide heterojunction bipolar transistor wafers requires an overhang profile that prevents continuous metal film coverage along the resist sidewall. OFPR-800 can be used in a chlorobenzene soak process because the solvent penetrates the upper resist surface and reduces development rate at the surface, producing a reverse-tapered profile. The wafers are coated to 1.5 µm to 2.5 µm after HMDS vapor priming and softbaked at 90 °C to 100 °C for 90 s. After exposure with a g-line contact aligner at 130 mJ/cm² to 190 mJ/cm², the wafers are immersed in chlorobenzene for 10 min to 20 min, then developed in 2.38% TMAH with gentle agitation to preserve the overhang. The metal stack, typically Ti/Pt/Au or Ni/Ge/Au ohmic contacts, is deposited by electron-beam evaporation to a thickness not exceeding 0.5 to 0.7 times the resist thickness, maintaining a clean discontinuity at the overhang. Lift-off is performed in N-methyl-2-pyrrolidone at 70 °C to 90 °C with ultrasonic assistance, and residual metal flags are inspected by scanning electron microscopy. Adhesion of the resist to GaAs and silicon nitride passivation is evaluated by tape test following ASTM D3359-17; a typical target classification is 4B or better. The terminal products are emitter, base, and collector metal electrodes in gallium arsenide heterojunction bipolar transistors used for radio-frequency power amplifiers. Because chlorobenzene handling requires closed-loop solvent recovery and compliance with volatile organic compound emission limits, the process is confined to fabs with solvent hoods and appropriate fire suppression. Published data comparing OFPR-800 to dedicated bilayer lift-off resists on GaAs is limited, so each lot is qualified with a monitor wafer measuring undercut by scanning electron microscopy before device wafers are processed. Lifted-metal flaps are a known failure mode when exposure dose exceeds 190 mJ/cm² and the overhang becomes too shallow.

When AlGaInP LED Mesa Etching Requires a G-Line Resist With Tighter Thermal Stability

AlGaInP light-emitting diode mesa fabrication involves inductively coupled plasma etching in BCl₃/Cl₂ chemistry, where the resist is subjected to thermal and ion bombardment stress. When the fab’s aligner inventory is restricted to g-line steppers or contact aligners, OFPR-800 is evaluated for mesa masking instead of switching to i-line resists. Film thickness is typically 2.0 µm to 3.0 µm by double coating or low spin speed, and the softbake condition is set at 100 °C to 110 °C for 120 s. Exposure on a g-line stepper at 436 nm uses a dose of 160 mJ/cm² to 240 mJ/cm² to ensure complete development through the thick film. After development in 2.38% TMAH, a deep-UV flood exposure or a hardbake at 120 °C to 135 °C for 240 s stabilizes the resist for plasma etch. The mesa etch is run in an ICP-RIE tool with Cl₂/BCl₃ gas ratio between 1:1 and 1:4, substrate temperature from 20 °C to 60 °C, and RF bias power that determines resist erosion rate. Published quantitative selectivity data for OFPR-800 in AlGaInP mesa etching is limited; process qualification therefore measures resist remaining after etch by stylus profilometry and requires a residual thickness of at least 0.5 µm to protect the underlying semiconductor. Endpoint detection by optical emission spectroscopy is used to terminate the main etch at the AlInP layer, preventing over-etching. The terminal product is the red-orange LED die with defined p-GaP and n-AlInP sidewalls. Post-etch residue is removed with oxygen plasma ashing and wet strip in N-methyl-2-pyrrolidone at 80 °C to 100 °C. Plasma erosion at the mesa edge has been observed to cause sidewall roughening when residual resist falls below 0.5 µm, so etch time and resist thickness are monitored together.In discrete power device manufacturing, OFPR-800 is applied to delineate silicon nitride or polyimide passivation openings over anode and cathode regions. The wafers are processed through passivation deposition, then coated with the resist after an oxygen plasma descum to improve wetting. Because the surface has steps from field plates, a lower spin speed or spray coating is used to achieve a conformal film of 1.5 µm to 2.0 µm over edge topography. Softbake is performed at 95 °C to 105 °C for 100 s to 140 s. Exposure through a proximity aligner at 436 nm includes deliberate overexposure of 10% to 20% to compensate for reflective notching over metal pads. Development in 2.38% TMAH is completed in spray mode with endpoint detection, followed by a hardbake at 115 °C to 135 °C for 180 s to stabilize the mask against buffered oxide etch or reactive ion etch of silicon nitride. The dry etch step uses CF₄/O₂ plasma; resist thickness loss should remain below 0.3 µm for the required nitride etch depth. After etching, the resist is removed by oxygen plasma ashing and NMP wet solvent. The terminal outputs are p-n junction termination and contact openings in discrete power rectifiers, thyristors, and transient voltage suppression diodes. Residual resist after strip is inspected by scanning electron microscopy and quantified by energy-dispersive X-ray spectroscopy for carbon content below 1 atomic percent on the etched surface. The process window is limited by substrate reflectivity variation; on metal pad areas, a slightly thicker resist is often required to avoid scumming and incomplete development.

Lithium Niobate Pyroelectricity Complicates Interdigital Transducer Patterning

Lithium niobate surface acoustic wave filter fabrication uses OFPR-800 for aluminum interdigital transducer definition by wet etching or lift-off. LiNbO₃ is pyroelectric and requires careful bake temperature ramping to avoid crystal fracture; hotplate softbake is ramped from 60 °C to 95 °C over 60 s and held for 90 s. The resist is coated to 0.8 µm to 1.2 µm, because transducer finger widths of 1.5 µm to 3.0 µm require thinner films for resolution. Exposure is performed with a g-line stepper at 436 nm and a dose of 100 mJ/cm² to 140 mJ/cm²; reflective notching is controlled by reducing exposure dose on high-reflectivity aluminum or by using a dyed resist process. Development in 2.38% TMAH produces vertical sidewalls, and no hardbake is used prior to aluminum wet etching to avoid undercut changes. The aluminum wet etch in phosphoric-nitric-acetic acid at 30 °C to 40 °C is timed to achieve a finger width bias of less than 0.1 µm. After etching, resist is stripped with solvent and oxygen plasma; the interdigital transducer electrode pitch is measured by scanning electron microscopy or atomic force microscopy. The terminal product is a surface acoustic wave filter chip for mobile communication bands between 700 MHz and 2.7 GHz. Adhesion to LiNbO₃ is verified by tape test according to ASTM D3359-17, with 5B classification expected after HMDS priming. Published data for OFPR-800 on lithium niobate is limited; qualification monitors are used to check pyroelectric cracking and finger edge roughness before production lots are released.