Indium tin oxide layer polishing slurry classified as Electronic/EL Grade is introduced after sputter deposition and wet or dry etch patterning of indium tin oxide anodes and before hole injection layer deposition in a top-emission white active-matrix organic light-emitting diode stack. The slurry is a colloidal silica dispersion with a volumetric mean particle diameter controlled between 60 nm and 90 nm and a pH buffer window of 9.5–10.8; this window is selected because the alkaline condition activates hydroxyl-assisted dissolution of the tin-rich surface while limiting the attack rate on exposed aluminium or molybdenum interconnect metals. On a rigid-platen chemical mechanical polishing tool with a polyurethane pad, the anode is polished at a downforce of 2.0–3.5 psi, a platen speed of 60–80 rpm, and a slurry flow of 120–180 mL/min per 200 mm carrier. In situ diamond disk conditioning is used continuously to maintain pad microtexture and prevent removal-rate decay. The endpoint is detected by motor current shift or by optical reflectance when the surface becomes specular. Post-polish root mean square roughness is verified by atomic force microscopy over a 5 µm × 5 µm scan area in accordance with ISO 25178-2:2021 areal texture methodology; the qualified upper limit is 0.5 nm for the anode before hole injection layer deposition. Thickness change is measured by spectroscopic ellipsometry before and after polishing, and sheet resistance is checked by four-point probe according to ASTM F1711-20. The terminal products are micro-OLED or active-matrix OLED displays for head-mounted display modules and mobile devices.Post-CMP cleaning is performed in a dedicated scrubber with double-sided polyvinyl alcohol brush scrubbing, megasonic deionized water agitation, and an intermediate dilute organic acid rinse at pH 3.5–4.0 to chelate trace metal residues before final rinse and spin dry. The cleaning sequence is critical because residual alkali metal ions on the ITO surface are mobile under bias and have been shown to migrate into the adjacent hole injection layer during accelerated storage at 85 °C and 85% relative humidity. The qualified cleanroom environment is maintained to ISO 14644-1:2015 Class 4 or better in the wet process bay. After cleaning, dark-field inspection with a 0.3 µm detection threshold is used to reject adders; more than 50 post-polish adders per 200 mm substrate triggers pad conditioning, slurry filter replacement, or bath exchange. Published data for dark-spot growth rates on polished versus unpolished ITO in top-emission OLED stacks is limited, but failure analysis associates residual ITO asperities with localized current injection enhancement and premature luminance decay.

Which Surface Damage Modes Emerge on ITO-Coated Silicon Backplanes During CMP for Liquid Crystal on Silicon Microdisplays?

On reflective liquid crystal on silicon microdisplays, the indium tin oxide pixel electrode is deposited over complementary metal-oxide-semiconductor backplane topography that includes aluminium interconnect lines, tungsten vias, and plasma-enhanced chemical vapour deposition silicon dioxide dielectric trenches with step heights from 0.4 µm to 1.2 µm. Chemical mechanical polishing is used to reduce the ITO surface roughness and remove protrusions that would otherwise create alignment irregularities in the liquid crystal cell gap. The polished surface must retain sufficient ITO thickness at pixel centres to keep sheet resistance below the backplane design limit; four-point probe acceptance is evaluated under ASTM F1711-20. Two mechanical damage modes dominate: brittle lateral cracking at the edges of the oxide-filled trenches and micro-scratch tracks caused by agglomerated colloidal silica particles that exceed the pad contact film thickness. To suppress brittle cracking, the polishing downforce is held below 2.5 psi and the particle size distribution is maintained with a maximum 99th percentile particle diameter below 150 nm; larger particles are removed through point-of-use filtration with a 0.5 µm retention depth filter.Galvanic attack at the aluminium/ITO interface is a more severe yield loss mechanism than scratching in this configuration. In alkaline silica slurry at pH 9.5–10.8, exposed aluminium at the pixel edge forms a galvanic couple with the surrounding ITO; the resulting anodic current density can produce voiding along the aluminium line. A benzotriazole-based corrosion inhibitor is added in the range of 0.1–0.5 wt% to passivate the aluminium surface without completely suppressing the ITO removal rate. The qualified addition level is controlled to ±0.05 wt% because excess inhibitor adsorbs on the ITO surface and reduces the removal rate by more than 20%. Post-polish aluminium loss is quantified by sheet resistance shift of the pixel column lines; an increase greater than 2% of the design value is rejected. The terminal product is a liquid crystal on silicon microdisplay for pico-projectors, near-eye display units, and vehicle head-up display modules.Flexible polymer substrates introduce a different contact mechanics regime that changes the allowable CMP process envelope for Electronic/EL Grade ITO slurry. In flexible active-matrix organic light-emitting diode processing, a 20–25 µm polyimide film is temporarily bonded to a rigid glass carrier, and the ITO or buffer layer is polished only while the carrier remains planar. Free-standing web polishing is not industrially common because the polymer substrate lacks a fixed back reference plane and the pad contact area becomes dependent on web tension and local thickness variation, producing non-uniform removal. The downforce on flexible substrates is therefore reduced to 0.8–1.5 psi, and the platen speed is capped at 50 rpm to limit frictional heating. Under these low-velocity conditions, the removal rate drops substantially, so endpoint detection relies on optical reflectance rather than motor current change. Post-polish inspection includes optical micrography under differential interference contrast and adhesion tape testing per ASTM D3359-23 to verify that the pad shear did not initiate edge delamination. The polished ITO surface can improve bending durability by reducing critical surface flaws, but published data for specific improvement factors on flexible electronic devices is limited; the dominant industry trend is to replace brittle ITO with silver nanowire or conducting polymer networks in ultra-flexible displays.The same slurry lot used for rigid display polishing is not directly transferable to flexible carrier-bonded substrates. Dilution with deionized water at 1:1 to 1:2 lowers the abrasive concentration and reduces scratch density, but also narrows the pH buffer capacity; inline pH monitoring must be tightened to 10.0–10.5. If the pH drifts above 10.8, the temporary glass carrier edge adhesive can be chemically attacked, causing carrier debonding and wafer-scale loss of vacuum. The terminal applications are bendable touch sensors and foldable cover and display modules, but the manufacturing sequence for those products is shifting toward no-ITO transparent conductors; therefore the slurry use is confined to specialized flexible sensor runs with narrow substrate radii.

If Laser Ablation Generated ITO Debris on Single-Layer Capacitive Touch Sensors, What Edge Conditioning Window Applies?

The one-glass solution touch sensor stack is built on 0.55 mm or 0.7 mm alkali-free aluminosilicate glass with a single ITO layer patterned by pulsed infrared or ultraviolet laser ablation. Laser ablation leaves condensed ITO debris along channel edges and occasionally raises sub-micrometre burrs that can bridge adjacent sensor channels or create visual defect lines under bright-field inspection. In this application the Electronic/EL Grade slurry is used not as a bulk planarization medium but as a nanoscale edge conditioner. The slurry is diluted with deionized water at a ratio of 1:1 to 1:3, and a soft polyurethane pad with Shore A hardness 60–75 is used. Downforce is limited to 0.5–1.0 psi, and dwell time is restricted to 20–40 seconds; longer polishing widens the ablated channel and violates the touch sensor electrical design rule for inter-electrode capacitance.Process qualification uses scanning electron microscopy or optical profilometry to measure ablation channel width before and after polishing. The accepted width increase is less than 0.2 µm. Four-point probe sheet resistance mapping per ASTM F1711-20 is used to confirm that edge conditioning does not increase the ITO channel resistance by more than 3% of the design value. A common failure mode is edge pitting at the ITO/glass interface due to repeated contact with agglomerated slurry particles; this is controlled by point-of-use filtration and recirculation through a 0.5 µm filter. Terminal products are projected capacitive touch screens for consumer tablets, automotive centre consoles, and industrial human-machine interface panels.

Electroluminescent Display Phosphor Interface and ITO Surface Conditioning

Thin-film electroluminescent displays fabricated on 0.3 mm to 0.5 mm alkali-free borosilicate or aluminosilicate glass use an ITO bottom transparent electrode beneath a dielectric-metal-dielectric stack and a manganese-doped zinc sulfide or rare-earth oxysulfide phosphor. The ITO surface is polished to remove physical asperities that intensify the local electric field at the dielectric interface, because alternating-current drive fields in these devices reach 1.5–2.0 MV/cm. The Electronic/EL Grade slurry specification sets maximum sodium and lithium concentrations at <100 ppb each and maximum potassium at <50 ppb because alkali ions in the ITO surface can drift into the phosphor under high field and cause luminance non-uniformity. Polishing is conducted on a single-side rotary CMP tool with a hard polyurethane pad at a downforce of 1.5–2.5 psi and a carrier speed of 40–60 rpm. The endpoint is determined when optical reflectance stabilizes and the atomic force microscope roughness measured over a 10 µm × 10 µm area drops below 0.8 nm RMS according to ISO 25178-2:2021.The polished ITO surface is then subjected to dielectric withstand testing on patterned dot arrays in accordance with IEC 60243-1:2013; the acceptance criterion is no breakdown below the specified field threshold. The post-CMP cleaning sequence is free of sodium-containing detergents and uses electronic-grade citric acid diluted to pH 3.5–4.0 followed by ultrapure water rinsing to avoid redepositing mobile ions. Terminal products include avionics cockpit displays, military vehicle instrument panels, and industrial monitors that cannot accept luminance drift across an operating temperature range from -40 °C to 85 °C.

Alkaline Drift Above pH 11 Creates a Galvanic Corrosion Threshold at Molybdenum/Aluminum/ITO Triple Interfaces

During extended polishing campaigns on display backplanes that contain both molybdenum and aluminium interconnect layers beneath the ITO electrode, the slurry pH can drift upward from the qualified set point of 10.2 toward 11.5 because of dilution-water variability, pad debris, and evaporative loss of buffering agents. Once the pH exceeds 11.0, the aluminium etch rate in the presence of ITO particles rises sharply, and the galvanic couple at the aluminium/ITO edge accelerates void formation. Published CMP corrosion studies indicate that the anodic current density on aluminium in silica slurry with ITO present can be one order of magnitude higher than the current density in the same slurry without ITO. To maintain the process boundary, the slurry is recirculated through a point-of-use filter with 0.5 µm retention and the inline pH electrode is calibrated at least every 2 hours. The acceptable pH range for the qualified process is 10.0–10.8; deviations outside this band trigger an automatic pad reconditioning cycle and a slurry blend check.

Slurry parameter	Qualified acceptance window	Test method or equipment
pH at 25 °C	10.0–10.8	ASTM E70-19 glass electrode
Volumetric mean particle size	60–90 nm	ISO 13320-1:2020 laser diffraction
Zeta potential at pH 10.2	-30 to -50 mV	ISO 13099-2:2012 electrophoretic light scattering
Large particle count ≥0.5 µm	≤100 particles/mL	ISO 21501-2:2019 calibrated optical particle counter
Sodium	≤100 ppb	Inductively coupled plasma mass spectrometry per EPA 6020B
Iron	≤50 ppb	Inductively coupled plasma mass spectrometry per EPA 6020B

On the CMP tool, pad temperature is held between 20 °C and 30 °C; an increase above 30 °C lowers the slurry viscosity below 1.5 cP and produces edge-fast removal on display-sized substrates. The slurry flow rate is set just high enough to keep the pad surface wet without allowing pooling, because pooling locally reduces shear stress and promotes agglomeration of silica particles. The platen speed is kept below 80 rpm to prevent slurry flinging from the carrier. These limits are derived from production-scale failure analysis rather than laboratory beaker tests; batch-to-batch variation in mean particle diameter of 10 nm has been shown to shift the ITO removal rate by more than 15% when all other parameters are held constant. The terminal impact of a galvanic corrosion threshold breach is an open or high-resistance pixel line, which is detected by array testing and sometimes by temperature-dependent leakage current signature after module assembly.